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Mixed Signal Design Verification Engineer

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Location: Dallas, United States
Steet Address: Dallas, Texas, United States
Posted on: 21 Aug 2015

Description

Company Name: Texas Instrutments, Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world\'s brightest minds, TI creates innovations that shape the future of technology. TI is helping more than 100,000 customers transform the future, today. We\'re committed to building a better future - from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us - change the world, love your job!, As a Mixed-Signal Design Verification Engineer you will execute the pre-silicon verification of mixed-signal IC products. Implement mixed-signal test-benches to apply stimulus and checks to verify DUT behavior. Utilize Verilog, Verilog-A, Verilog-AMS to stimulus and check mixed-signal circuits. Create functional coverage models of mixed-signal circuits for voltages and currents, real numbers, integers, and traditional digital functional coverage. Work with complex mixed-signal semiconductor chip designs. Work with design and systems teams to close bugs as they arise. Review the digital and analog design to provide guidance on Design for Verification architecture and features during chip development. Evaluate system-level use-cases and re-create these in simulation, including communication with customers to convey results and understand these system cases. Use Cadence Virtuoso, spectre spice simulation, Incisive and AMS simulators. Utilize RTL and Gates+SDF, including verifying chip-level timing between analog and digital circuits. Constrained-random stimulus and auto-checking verification environments, especially constrained-random analog stimulus. Work in bug tracking and RTL code coverage. Create behavioral models of analog circuits and verifying closed-loop simulation with digital design and analog behavioral models., Basic Qualifications Bachelors Degree in Electrical Engineering and 2 years of experience in Analog Design, Digital Design, or equivalent experience., Or Master\'s degree in Electrical Engineering or Computer Engineering, with completion of 1 university co-op or internship in electrical engineering to include programming in Verilog, VHDL, Verilog-A, Verilog-AMS, or C in the semiconductor industry, or 3 months of experience as a graduate research assistant involving electrical engineering to include programming in Verilog, VHDL, Verilog-A, Verilog-AMS, or C. Equivalent work experience accepted in lieu of course requirements. Preferred Qualifications & Skills * Scripting and automation using Unix/Linux shell, PERL, Python, C or other similar languages * SystemVerilog, Verilog RTL, Verilog-AMS and Verilog-A * Advanced verification tools and skills such as SystemVerilog, UVM, functional and code coverage, formal property checking, constrained-random stimulus, auto checking * Gates+SDF simulation * Analog circuit design, transient, DC, AC simulation and Monte Carlo analysis basics * Cadence Virtuoso, Spectre circuit simulator, Incisive and AMS simulators experience * Circuit layout, parasitic extraction IC chip design, assembly and tapeout lifecycle and flow experience, Texas Instruments is an equal opportunity employer and supports a diverse, inclusive work environment. All qualified applicants will receive consideration for employment without regard to protected characteristics, including race, color, religion, sex, national origin, disability, veteran status, sexual orientation, gender identity, or age., Job Opening Type Experienced Professional, Minimum Education Level Bachelor\'s Level Degree, Related Field(s) of Study Electrical Engineering, Minimum Years of Experience 5, Regular / Temporary Regular, Full-time / Part-time Full-Time, Country United States, Job Location(s) USA-Texas-Dallas Metroplex, Virtual / Telecommute No, Job Code 000401 Analog Design Engineer

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